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ASYNC
2007
IEEE
132views Hardware» more  ASYNC 2007»
16 years 24 days ago
Area Optimizations for Dual-Rail Circuits Using Relative-Timing Analysis
Future deep sub-micron technologies will be characterized by large parametric variations, which could make asynchronous design an attractive solution for use on large scale. Howev...
Tiberiu Chelcea, Girish Venkataramani, Seth Copen ...
DATE
2007
IEEE
99views Hardware» more  DATE 2007»
16 years 24 days ago
Very wide register: an asymmetric register file organization for low power embedded processors
In current embedded systems processors, multi-ported register files are one of the most power hungry parts of the processor, even when they are clustered. This paper presents a n...
Praveen Raghavan, Andy Lambrechts, Murali Jayapala...
IV
2007
IEEE
136views Visualization» more  IV 2007»
16 years 22 days ago
Dynamic Text Filtering for Improving the Usability of Alphasliders on Small Screens
Previous research has shown that Alphasliders are an effective tool for searching an alphabetically sorted list when only limited screen space is available for the graphical user ...
Thorsten Büring, Jens Gerken, Harald Reiterer
ITNG
2007
IEEE
16 years 20 days ago
On the Physicl Layout of PRDT-Based NoCs
In this paper, we present PRDT(2, 1), a new interconnection network topology for Network-on-chip (NoC) design. PRDT(2,1) features a recursive structure, and has small diameter and...
Guoqiang Yang, Mei Yang, Yulu Yang, Yingtao Jiang
DAMON
2007
Springer
16 years 19 days ago
Pipelined hash-join on multithreaded architectures
Multi-core and multithreaded processors present both opportunities and challenges in the design of database query processing algorithms. Previous work has shown the potential for ...
Philip Garcia, Henry F. Korth