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IMCSIT
2010
15 years 3 months ago
Software and hardware in the loop component for an IEC 61850 Co-Simulation platform
The deployment of IEC61850 standard in the world of substation automation system brings to the use of specific strategies for architecture testing. To validate IEC61850 architectur...
Haffar Mohamad, Thiriet Jean Marc
ASPDAC
2012
ACM
290views Hardware» more  ASPDAC 2012»
14 years 2 months ago
CODA: A concurrent online delay measurement architecture for critical paths
With technology scaling, integrated circuits behave more unpredictably due to process variation, environmental changes and aging effects. Various variation-aware and adaptive desi...
Yubin Zhang, Haile Yu, Qiang Xu
DAC
2003
ACM
16 years 7 months ago
Multilevel global placement with retiming
Multiple clock cycles are needed to cross the global interconnects for multi-gigahertz designs in nanometer technologies. For synchronous designs, this requires retiming and pipel...
Jason Cong, Xin Yuan
CHI
1996
ACM
15 years 10 months ago
Technomethodology: Paradoxes and Possibilities
The design of CSCW systems has often had its roots in ethnomethodological understandings of work and investigations of working settings. Increasingly, we are also seeing these ide...
Graham Button, Paul Dourish
DATE
2009
IEEE
132views Hardware» more  DATE 2009»
16 years 1 months ago
Power and performance of read-write aware Hybrid Caches with non-volatile memories
—Caches made of non-volatile memory technologies, such as Magnetic RAM (MRAM) and Phase-change RAM (PRAM), offer dramatically different power-performance characteristics when com...
Xiaoxia Wu, Jian Li, Lixin Zhang, Evan Speight, Yu...