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CGO
2005
IEEE
15 years 11 months ago
Compiler Managed Dynamic Instruction Placement in a Low-Power Code Cache
Modern embedded microprocessors use low power on-chip memories called scratch-pad memories to store frequently executed instructions and data. Unlike traditional caches, scratch-p...
Rajiv A. Ravindran, Pracheeti D. Nagarkar, Ganesh ...
CCR
2002
72views more  CCR 2002»
15 years 5 months ago
Provisioning on-line games: a traffic analysis of a busy counter-strike server
This paper describes the results of a 500 million packet trace of a popular on-line, multi-player, game server. The results show that the traffic behavior of this heavily loaded ga...
Francis Chang, Wu-chang Feng, Wu-chi Feng, Jonatha...
POPL
2008
ACM
16 years 6 months ago
Formal verification of translation validators: a case study on instruction scheduling optimizations
Translation validation consists of transforming a program and a posteriori validating it in order to detect a modification of its semantics. This approach can be used in a verifie...
Jean-Baptiste Tristan, Xavier Leroy
ICNP
2009
IEEE
16 years 22 days ago
Better by a HAIR: Hardware-Amenable Internet Routing
—Routing protocols are implemented in the form of software running on a general-purpose microprocessor. However, conventional software-based router architectures face significan...
Firat Kiyak, Brent Mochizuki, Eric Keller, Matthew...
TLCA
2009
Springer
16 years 19 days ago
Lexicographic Path Induction
Abstract. Programming languages theory is full of problems that reduce to proving the consistency of a logic, such as the normalization of typed lambda-calculi, the decidability of...
Jeffrey Sarnat, Carsten Schürmann