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DSN
2007
IEEE
16 years 26 days ago
Minimizing Response Time for Quorum-System Protocols over Wide-Area Networks
A quorum system is a collection of sets (quorums) of servers, where any two quorums intersect. Quorumbased protocols underly modern edge-computing architectures and throughput-sca...
Florian Oprea, Michael K. Reiter
ISCA
2007
IEEE
126views Hardware» more  ISCA 2007»
16 years 24 days ago
Comparing memory systems for chip multiprocessors
There are two basic models for the on-chip memory in CMP systems: hardware-managed coherent caches and software-managed streaming memory. This paper performs a direct comparison o...
Jacob Leverich, Hideho Arakida, Alex Solomatnikov,...
DATE
2003
IEEE
102views Hardware» more  DATE 2003»
15 years 11 months ago
Power Constrained High-Level Synthesis of Battery Powered Digital Systems
We present a high-level synthesis algorithm solving the combined scheduling, allocation and binding problem minimizing area under both latency and maximum power per clock-cycle co...
S. F. Nielsen, Jan Madsen
DATE
2000
IEEE
101views Hardware» more  DATE 2000»
15 years 11 months ago
Memory Arbitration and Cache Management in Stream-Based Systems
With the ongoing advancements in VLSI technology, the performance of an embedded system is determined to a large extend by the communication of data and instructions. This results...
Françoise Harmsze, Adwin H. Timmer, Jef L. ...
DAGSTUHL
2001
15 years 8 months ago
Visualization for the Mind's Eye
Software visualization has been almost exclusively tackled from the visual point of view; this means visualization occurs exclusively through the visual channel. This approach has ...
Nelson A. Baloian, Wolfram Luther