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PACS
2004
Springer
115views Hardware» more  PACS 2004»
16 years 7 days ago
Reducing Delay and Power Consumption of the Wakeup Logic Through Instruction Packing and Tag Memoization
Dynamic instruction scheduling logic is one of the most critical components of modern superscalar microprocessors, both from the delay and power dissipation standpoints. The delay ...
Joseph J. Sharkey, Dmitry Ponomarev, Kanad Ghose, ...
WCW
2004
Springer
16 years 6 days ago
Distributed Hashtable on Pre-structured Overlay Networks
Internet overlay services must adapt to the substrate network topology and link properties to achieve high performance. A common overlay structure management layer is desirable fo...
Kai Shen, Yuan Sun
RTAS
2003
IEEE
16 years 4 days ago
Collaborative Operating System and Compiler Power Management for Real-Time Applications
Managing energy consumption has become vitally important to battery operated portable and embedded systems. A dynamic voltage scaling (DVS) technique reduces the processor’s dyn...
Nevine AbouGhazaleh, Daniel Mossé, Bruce R....
EMMCVPR
2003
Springer
16 years 3 days ago
Asymptotic Characterization of Log-Likelihood Maximization Based Algorithms and Applications
The asymptotic distribution of estimates that are based on a sub-optimal search for the maximum of the log-likelihood function is considered. In particular, estimation schemes that...
Doron Blatt, Alfred O. Hero
CLUSTER
2002
IEEE
15 years 12 months ago
High Performance User Level Sockets over Gigabit Ethernet
While a number of User-Level Protocols have been developed to reduce the gap between the performance capabilities of the physical network and the performance actually available, a...
Pavan Balaji, Piyush Shivam, Pete Wyckoff, Dhabale...