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IPPS
2006
IEEE
16 years 23 days ago
Tree-based overlay networks for scalable applications
The increasing availability of high-performance computing systems with thousands, tens of thousands, and even hundreds of thousands of computational nodes is driving the demand fo...
Dorian C. Arnold, G. D. Pack, Barton P. Miller
IPPS
2006
IEEE
16 years 22 days ago
An adaptive system-on-chip for network applications
This paper presents the hardware architecture of DynaCORE, a dynamically reconfigurable system-on-chip for network applications. DynaCORE is an application specific coprocessor ...
Roman Koch, Thilo Pionteck, Carsten Albrecht, Erik...
ISCAS
2006
IEEE
116views Hardware» more  ISCAS 2006»
16 years 22 days ago
Neural network stream processing core (NnSP) for embedded systems
Abstract— NnSP is a stream-based programmable and codelevel statically reconfigurable processor for realization of neural networks in embedded systems. NnSP is provided with a n...
Hadi Esmaeilzadeh, Pooya Saeedi, Babak Nadjar Araa...
INFOCOM
2005
IEEE
16 years 9 days ago
A new admission control scheme under energy and QoS constraints for wireless networks
— Battery capacity of mobile terminals and radio bandwidth are both limited and precious resources in wireless networks. In this paper, we present a thorough performance study of...
Wenye Wang, Xinbing Wang, Arne A. Nilsson
IPPS
2005
IEEE
16 years 9 days ago
Technology-based Architectural Analysis of Operand Bypass Networks for Efficient Operand Transport
As semiconductor feature sizes decrease, interconnect delay is becoming a dominant component of processor cycle times. This creates a critical need to shift microarchitectural des...
Hongkyu Kim, D. Scott Wills, Linda M. Wills