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ASPLOS
2006
ACM
16 years 24 days ago
Software-based instruction caching for embedded processors
While hardware instruction caches are present in virtually all general-purpose and high-performance microprocessors today, many embedded processors use SRAM or scratchpad memories...
Jason E. Miller, Anant Agarwal
CODES
2005
IEEE
16 years 13 days ago
CRAMES: compressed RAM for embedded systems
Memory is a scarce resource in many embedded systems. Increasing memory often increases packaging and cooling costs, size, and energy consumption. This paper presents CRAMES, an e...
Lei Yang, Robert P. Dick, Haris Lekatsas, Srimat T...
DSN
2005
IEEE
16 years 13 days ago
Checking Array Bound Violation Using Segmentation Hardware
The ability to check memory references against their associated array/buffer bounds helps programmers to detect programming errors involving address overruns early on and thus avo...
Lap-Chung Lam, Tzi-cker Chiueh
KBSE
2005
IEEE
16 years 12 days ago
Testing in resource constrained execution environments
Software for resource constrained embedded devices is often implemented in the Java programming language because the Java compiler and virtual machine provide enhanced safety, por...
Gregory M. Kapfhammer, Mary Lou Soffa, Daniel Moss...
VEE
2005
ACM
143views Virtualization» more  VEE 2005»
16 years 11 days ago
Optimized interval splitting in a linear scan register allocator
We present an optimized implementation of the linear scan register allocation algorithm for Sun Microsystems’ Java HotSpotTM client compiler. Linear scan register allocation is ...
Christian Wimmer, Hanspeter Mössenböck