1093 search results - page 87 / 219 » Verifying VLSI Circuits |
182
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VLSID
2003
IEEE
16 years 8 months ago
2003
IEEE
Functional decomposition is a process of splitting a complex circuit into smaller sub-circuits. This paper deals with the problem of determining the set of best free and bound var...
187
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ICCAD
2002
IEEE
16 years 4 months ago
2002
IEEE
For many years, CMOS process scaling has allowed a steady increase in the operating frequency and integration density of integrated circuits. Only recently, however, have we reach...
179
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VLSID
2006
IEEE
16 years 1 months ago
2006
IEEE
In this paper, for the first time, we analyze non-quasistatic (NQS) effects during single-event upsets (SEUs) in deep-submicron (DSM) MOS devices, using extensive 2D device, BSIM...
193
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CEC
2005
IEEE
16 years 1 months ago
2005
IEEE
Testing of VLSI circuits can cause generation of excessive heat which can damage the chips under test. In the random testing environment, high-performance CMOS circuits consume sig...
192
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DFT
2005
IEEE
16 years 1 months ago
2005
IEEE
This paper analyzes the deposition defects in devices and circuits made of Quantum-dot Cellular Automata (QCA) for molecular implementation. Differently from metal-based QCA, in ...