1093 search results - page 60 / 219 » Verifying VLSI Circuits |
129
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GLVLSI
2010
IEEE
15 years 11 months ago
2010
IEEE
An ultra-low area, current efficient voltage regulator appropriate for distributed point-of-load voltage regulation in high performance integrated circuits (ICs) is described in t...
145
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GLVLSI
2010
IEEE
15 years 11 months ago
2010
IEEE
In this paper, capacitive 4-PWAM transmitter architectures and circuits are proposed and its performances are analyzed with random jitter and PVT variation comparing with other wo...
142
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GLVLSI
2003
IEEE
15 years 11 months ago
2003
IEEE
- A current-mode logic (CML) buffer is based on a simple differential circuit. This paper investigates important problems involved in the design of a CML buffer as well as a chain ...
170
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HASE
2008
IEEE
15 years 6 months ago
2008
IEEE
In this paper, we propose a randomization based technique to verify whether a manufactured chip conforms to its design or is infected by any trojan circuit. A trojan circuit can be...
168
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CDES
2006
15 years 7 months ago
2006
- The need for faster circuits in smaller area with lower power dissipation has made it a common practice to use the domino CMOS in high performance integrated circuits. However th...