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    » Verifying VLSI Circuits
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    GLVLSI
    1999
    IEEE
    97views VLSI» more  GLVLSI 1999»
    Design and Analysis of a Novel Quantum-MOS Sense Amplifier Circuit
    15 years 11 months ago
    Design and Analysis of a Novel Quantum-MOS Sense Amplifier Circuit
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    Tetsuya Uemura, Pinaki Mazumder
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    164
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    GLVLSI
    1999
    IEEE
    133views VLSI» more  GLVLSI 1999»
    Residue Arithmetic Circuits Based on Signed-Digit Number Representation and the VHDL Implementation
    15 years 11 months ago
    Residue Arithmetic Circuits Based on Signed-Digit Number Representation and the VHDL Implementation
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    Shugang Wei, Kensuke Shimizu
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    GLVLSI
    1998
    IEEE
    121views VLSI» more  GLVLSI 1998»
    Mutually Disjoint Signals and Probability Calculation in Digital Circuits
    15 years 11 months ago
    Mutually Disjoint Signals and Probability Calculation in Digital Circuits
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    Vishwani D. Agrawal, Sharad C. Seth
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    GLVLSI
    1998
    IEEE
    106views VLSI» more  GLVLSI 1998»
    Test Compaction for Synchronous Sequential Circuits by Test Sequence Recycling
    15 years 11 months ago
    Test Compaction for Synchronous Sequential Circuits by Test Sequence Recycling
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    Irith Pomeranz, Sudhakar M. Reddy
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    129
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    GLVLSI
    1998
    IEEE
    83views VLSI» more  GLVLSI 1998»
    A Design-for-Testability Technique for Detecting Delay Faults in Logic Circuits
    15 years 11 months ago
    A Design-for-Testability Technique for Detecting Delay Faults in Logic Circuits
    Download  www.cs.york.ac.uk
    Kaamran Raahemifar, Majid Ahmadi
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