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    GLVLSI
    2007
    IEEE
    154views VLSI» more  GLVLSI 2007»
    Analyzing and modeling process balance for sub-threshold circuit design
    16 years 1 months ago
    Analyzing and modeling process balance for sub-threshold circuit design
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    Joseph F. Ryan, Jiajing Wang, Benton H. Calhoun
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    153
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    GLVLSI
    2003
    IEEE
    125views VLSI» more  GLVLSI 2003»
    MuTaTe: an efficient design for testability technique for multiplexor based circuits
    16 years 21 days ago
    MuTaTe: an efficient design for testability technique for multiplexor based circuits
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    Rolf Drechsler, Junhao Shi, Görschwin Fey
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    145
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    GLVLSI
    2003
    IEEE
    150views VLSI» more  GLVLSI 2003»
    Repeater and current-sensing hybrid circuits for on-chip interconnects
    16 years 21 days ago
    Repeater and current-sensing hybrid circuits for on-chip interconnects
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    Atul Maheshwari, Wayne Burleson
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    GLVLSI
    1999
    IEEE
    130views VLSI» more  GLVLSI 1999»
    Advances Toward Molecular-Scale Electronic Digital Logic Circuits: A Review and Prospectus
    15 years 11 months ago
    Advances Toward Molecular-Scale Electronic Digital Logic Circuits: A Review and Prospectus
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    James C. Ellenbogen
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    127
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    GLVLSI
    1999
    IEEE
    96views VLSI» more  GLVLSI 1999»
    A Novel High-Speed Flip-Flop Circuit Using RTDs and HEMTs
    15 years 11 months ago
    A Novel High-Speed Flip-Flop Circuit Using RTDs and HEMTs
    Download  www.cs.york.ac.uk
    Hideaki Matsuzaki, Toshihiro Itoh, Masafumi Yamamo...
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