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DAC
1996
ACM
15 years 11 months ago
Integrating Formal Verification Methods with A Conventional Project Design Flow
We present a formal verification methodology that we have used on a computer system design project. The methodology integrates a temporal logic model checker with a conventional pr...
Ásgeir Th. Eiríksson
DEXA
2004
Springer
83views Database» more  DEXA 2004»
15 years 10 months ago
Efficient Rule Base Verification Using Binary Decision Diagrams
As their field of application has evolved and matured, the importance of verifying knowledge-based systems is now widely recognized. Nevertheless, some problems have remained. In t...
Christophe Mues, Jan Vanthienen
ETRICS
2006
15 years 10 months ago
Possibilistic Information Flow Control in MAKS and Action Refinement
Abstract. Formal methods emphasizes the need for a top-down approach when developing large reliable software systems. Refinements are map step by step abstract algebraic specificat...
Dieter Hutter
SPIN
2000
Springer
15 years 10 months ago
Logic Verification of ANSI-C Code with SPIN
We describe a tool, called AX, that can be used in combination with the model checker SPIN to efficiently verify logical properties of distributed software systems implemented in A...
Gerard J. Holzmann
WSC
2007
15 years 9 months ago
ExtendSim 7
ExtendSim 7 is a proven simulation environment capable of modeling a wide range of systems. ExtendSim 7 is used to model continuous, discrete event, discrete rate, and agent based...
David Krahl