In this paper, we show how symbolic algebra in Mathematica can be used to formally verify analog and mixed signal designs. The verification methodology is based on combining induct...
This article presents an approach, which combines theorem proving-based refinement with model checking for state based real-time systems. Our verification flow starts from UML sta...
We present our experiences with the formal verification of an automotive chip used to control the safety features in a car. We used a BDD based model checker in our work. We descr...
Jae-Young Jang, Shaz Qadeer, Matt Kaufmann, Carl P...
We indicate strong non-approximability factors for central problems: N1/4 for Max Clique; N1/10 for Chromatic Number; and 66/65 for Max 3SAT. Underlying the Max Clique result is a...
We describe an automatic verification method to check whether transactional memories ensure strict serializability--a key property assumed of the transactional interface. Our main...