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» Verified systems by composition from verified components
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FDL
2007
IEEE
15 years 10 months ago
Transactor-based Formal Verification of Real-time Embedded Systems
With the increasing complexity of today's embedded systems, there is a need to formally verify such designs at mixed abstraction levels. This is needed if some compoe describ...
Daniel Karlsson, Petru Eles, Zebo Peng
JCP
2008
116views more  JCP 2008»
15 years 6 months ago
Formal Verification and Visualization of Security Policies
Verified and validated security policies are essential components of high assurance computer systems. The design and implementation of security policies are fundamental processes i...
Luay A. Wahsheh, Daniel Conte de Leon, Jim Alves-F...
ICCAD
2002
IEEE
100views Hardware» more  ICCAD 2002»
15 years 11 months ago
Optimal buffered routing path constructions for single and multiple clock domain systems
Shrinking process geometries and the increasing use of IP components in SoC designs give rise to new problems in routing and buffer insertion. A particular concern is that cross-c...
Soha Hassoun, Charles J. Alpert, Meera Thiagarajan
ICLP
2004
Springer
15 years 11 months ago
Applying CLP to Predict Extra-Functional Properties of Component-Based Models
A component is the basic re-usable unit of composition to build composite systems by connecting to others through their provided and required ports. Checking the functional complia...
Olivier Defour, Jean-Marc Jézéquel, ...
VLSI
2007
Springer
16 years 13 days ago
Estimating design time for system circuits
System design complexity is growing rapidly. As a result, current development costs are constantly increasing. It is becoming increasingly difficult to estimate how much time it ...
Cyrus Bazeghi, Francisco J. Mesa-Martinez, Brian G...