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193
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MICRO
2006
IEEE
16 years 24 days ago
2006
IEEE
We introduce virtually-pipelined memory, an architectural technique that efficiently supports high-bandwidth, uniform latency memory accesses, and high-confidence throughput eve...
136
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MICRO
2006
IEEE
16 years 24 days ago
2006
IEEE
Instruction aggregation—the grouping of multiple operations into a single processing unit—is a technique that has recently been used to amplify the bandwidth and capacity of c...
205
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MICRO
2006
IEEE
16 years 24 days ago
2006
IEEE
Designing and optimizing high performance microprocessors is an increasingly difficult task due to the size and complexity of the processor design space, high cost of detailed si...
159
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MICRO
2006
IEEE
16 years 24 days ago
2006
IEEE
To protect processor logic from soft errors, multicore redundant architectures execute two copies of a program on separate cores of a chip multiprocessor (CMP). Maintaining identi...
191
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P2P
2006
IEEE
16 years 24 days ago
2006
IEEE
The main purpose of many current peer-to-peer (P2P) networks is off-line file sharing. However, a potentially very promising use of such networks is to share video streams (e.g.,...