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CGO
2006
IEEE
16 years 26 days ago
Compiling for EDGE Architectures
Explicit Data Graph Execution (EDGE) architectures offer the possibility of high instruction-level parallelism with energy efficiency. In EDGE architectures, the compiler breaks ...
Aaron Smith, Jon Gibson, Bertrand A. Maher, Nichol...
CGO
2006
IEEE
16 years 26 days ago
Exhaustive Optimization Phase Order Space Exploration
The phase-ordering problem is a long standing issue for compiler writers. Most optimizing compilers typically have numerous different code-improving phases, many of which can be a...
Prasad Kulkarni, David B. Whalley, Gary S. Tyson, ...
CODES
2006
IEEE
16 years 26 days ago
A multiprocessing approach to accelerate retargetable and portable dynamic-compiled instruction-set simulation
Traditionally, instruction-set simulators (ISS’s) are sequential programs running on individual processors. Besides the advances of simulation techniques, ISS’s have been main...
Wei Qin, Joseph D'Errico, Xinping Zhu
DATE
2006
IEEE
78views Hardware» more  DATE 2006»
16 years 26 days ago
Wireless sensor networks and beyond
—Wireless Sensor Networks provide opportunities even outside their usual application domain of environmental monitoring. In this paper we present a case study on the use of Wirel...
Paul J. M. Havinga
DATE
2006
IEEE
104views Hardware» more  DATE 2006»
16 years 26 days ago
Integrated placement and skew optimization for rotary clocking
—The clock distribution network is a key component of any synchronous VLSI design. High power dissipation and pressure volume temperature-induced variations in clock skew have st...
Ganesh Venkataraman, Jiang Hu, Frank Liu, Cliff C....
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