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260
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ISPASS
2008
IEEE
2008
IEEE
An Analysis of I/O And Syscalls In Critical Sections And Their Implications For Transactional Memory
16 years 1 months ago
Transactional memory (TM) is a scalable and concurrent way to build atomic sections. One aspect of TM that remains unclear is how side-effecting operations – that is, those whic...
237
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MICRO
2008
IEEE
16 years 1 months ago
2008
IEEE
— As semiconductor processing techniques continue to scale down, transient faults, also known as soft errors, are increasingly becoming a reliability threat to high-performance m...
177
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MICRO
2008
IEEE
16 years 1 months ago
2008
IEEE
— Processor architectures with large instruction windows have been proposed to expose more instruction-level parallelism (ILP) and increase performance. Some of the proposed arch...
197
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NDSS
2008
IEEE
16 years 1 months ago
2008
IEEE
Protocol reverse engineering is the process of extracting application-level specifications for network protocols. Such specifications are very helpful in a number of security-re...
229
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NOCS
2008
IEEE
16 years 1 months ago
2008
IEEE
We present a methodology to debug a SOC by concentrating on its communication. Our extended communication model includes a) multiple signal groups per interface protocol at each I...