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» Verification of Model Transformations
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DAC
1995
ACM
15 years 10 months ago
Automatic Clock Abstraction from Sequential Circuits
Our goal is to transform a low-level circuit design into a more representation. A pre-existing tool, Tranalyze [4], takes a switch-level circuit and generates a functionally equiv...
Samir Jain, Randal E. Bryant, Alok Jain
FPGA
1995
ACM
120views FPGA» more  FPGA 1995»
15 years 10 months ago
Synthesis of Signal Processing Structured Datapaths for FPGAs Supporting RAMs and Busses
A novel approach is presented for transforming a given scheduled and bound signal processing algorithm for a multiplexer based datapath to a BUS/RAM based FPGA datapath. A datapat...
Baher Haroun, Behzad Sajjadi
ICCAD
1995
IEEE
95views Hardware» more  ICCAD 1995»
15 years 10 months ago
A sequential quadratic programming approach to concurrent gate and wire sizing
With an ever-increasing portion of the delay in highspeed CMOS chips attributable to the interconnect, interconnect-circuit design automation continues to grow in importance. By t...
Noel Menezes, Ross Baldick, Lawrence T. Pileggi
TACS
1997
Springer
15 years 10 months ago
Type System for Specializing Polymorphism
Abstract. Flexibility of programming and efficiency of program execution are two important features of a programming language. Unfortunately, however, there is an inherent conflict...
Atsushi Ohori
203
Voted
DLOG
2007
15 years 9 months ago
Distributed Description Logics Revisited
Distributed Description Logics (DDLs) is a KR formalism that enables reasoning with multiple ontologies interconnected by directional semantic mapping (bridge rules). DDLs capture ...
Martin Homola