5525 search results - page 339 / 1105 » Verification of Model Transformations |
169
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ASPDAC
2007
ACM
15 years 10 months ago
2007
ACM
In this paper, we present a method for generating checker circuits from sequential-extended regular expressions (SEREs). Such sequences form the core of increasingly-used Assertion...
184
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CAV
2006
Springer
15 years 10 months ago
2006
Springer
In automated synthesis, we transform a specification into a system that is guaranteed to satisfy the specification. In spite of the rich theory developed for system synthesis, litt...
184
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AICCSA
2001
IEEE
15 years 10 months ago
2001
IEEE
This paper2 details the stages of building a substantial, carefully specified, fully tested and fully operational university and school timetabling system. This is reported as a c...
174
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APLAS
2008
ACM
15 years 8 months ago
2008
ACM
Abstract. Parallel programming is rapidly gaining importance as a vector to develop high performance applications that exploit the improved capabilities of modern computer architec...
156
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DAC
1998
ACM
16 years 7 months ago
1998
ACM
We describe the verification of the IM: a large, complex (12,000 gates and 1100 latches) circuit that detects and marks the boundaries between Intel architecture (IA-32) instructi...