49 search results - page 2 / 10 » Vdd programmability to reduce FPGA interconnect power |
222
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DAC
2004
ACM
16 years 8 months ago
2004
ACM
Power optimization is of growing importance for FPGAs in nanometer technologies. Considering dual-Vdd technique, we show that configurable power supply is required to obtain a sat...
191
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DAC
2005
ACM
16 years 8 months ago
2005
ACM
Device optimization considering supply voltage Vdd and threshold voltage Vt tuning does not increase chip area but has a great impact on power and performance in the nanometer tec...
166
Voted
ICCAD
2004
IEEE
16 years 4 months ago
2004
IEEE
We propose two new FPGA routing switch designs that are programmable to operate in three different modes: highspeed, low-power or sleep. High-speed mode provides similar power an...
211
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ISLPED
2005
ACM
16 years 29 days ago
2005
ACM
This work first presents an analytical repeater insertion method which optimizes power under delay constraint for a single net. This method finds the optimal repeater insertion ...