In this paper, we propose the use of fine-grain process modelling as an aid to software development. We suggest the use of two levels of granularity, one at the level of the indiv...
Emerging single-chip heterogeneous multiprocessors feature hundreds of design elements contending for shared resources, making it difficult to isolate performance impacts of indiv...
Many testing and analysis techniques use finite state models to validate and verify the quality of software systems. Since the specification of such models is complex and timecons...
Automated verification is a technique for establishing if certain properties, usually expressed in temporal logic, hold for a system model. The model can be defined using a high-l...
ing models and HW-SW Interfaces Abstraction for Multi-Processor SoC Ahmed A. Jerraya TIMA Laboratory 46 Ave Felix Viallet 38031 Grenoble CEDEX, France +33476574759 Ahmed.Jerraya@im...