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JCDL
2006
ACM
99views Education» more  JCDL 2006»
16 years 18 days ago
Using resources across educational digital libraries
This article reports on analyses of usage and design activities by users of the Instructional Architect (IA), an end-user authoring tool designed to support easy access to and use...
Mimi Recker, Bart Palmer
GLVLSI
2005
IEEE
132views VLSI» more  GLVLSI 2005»
16 years 8 days ago
FPGA implementation of a modular and pipelined WF scheduler for high speed OC192 networks
In this paper we propose an FPGA implementation of a multi protocol Weighted Fair (WF) queuing algorithm able to handle variable length packets targeted for Packet Over Sonet (POS...
Abdallah Merhebi, Otmane Aït Mohamed
ISCAS
2003
IEEE
83views Hardware» more  ISCAS 2003»
15 years 12 months ago
Low-noise low-power allpole active-RC filters minimizing resistor level
The design procedure of 2nd - and 3rd -order low-sensitivity lowpower allpole active resistance-capacitance (RC) filters, using the impedance tapering design method has already be...
Drazen Jurisic, George S. Moschytz, Neven Mijat
DATE
2002
IEEE
83views Hardware» more  DATE 2002»
15 years 11 months ago
Reconfigurable SoC - What Will it Look Like?
The argument against ASIC SoCs is that they have always taken too long and cost too much to design. As new process technologies come on line, the issue of inflexible, unyielding d...
J. Bryan Lewis, Ivo Bolsens, Rudy Lauwereins, Chri...
BMAS
2000
IEEE
15 years 11 months ago
Integration of Mechanical CAD and Behavioral Modeling
This article introduces the concept of combining both form (CAD models) and behavior (simulation models) of mechatronic system components into component objects. By composing thes...
Rajarishi Sinha, Christiaan J. J. Paredis, Pradeep...