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    ASPDAC
    2006
    ACM
    97views Hardware» more  ASPDAC 2006»
    SASIMI: sparsity-aware simulation of interconnect-dominated circuits with non-linear devices
    16 years 5 days ago
    SASIMI: sparsity-aware simulation of interconnect-dominated circuits with non-linear devices
    Download  cobweb.ecn.purdue.edu
    We present a technique for the fast and accurate simulation of largescale VLSI interconnects with nonlinear devices, called SASIMI. The numerical efficiency of this technique is ...
    Jitesh Jain, Stephen Cauley, Cheng-Kok Koh, Venkat...
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    FCCM
    2005
    IEEE
    81views VLSI» more  FCCM 2005»
    Performance and Cost Analysis of Time-Multiplexed Execution on the Dynamically Reconfigurable Processor
    15 years 11 months ago
    Performance and Cost Analysis of Time-Multiplexed Execution on the Dynamically Reconfigurable Processor
    Download  csdl2.computer.org
    Hideharu Amano, Shohei Abe, Yohei Hasegawa, Katsua...
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    FCCM
    2005
    IEEE
    155views VLSI» more  FCCM 2005»
    An Open TCP/IP Core for Reconfigurable Logic
    15 years 11 months ago
    An Open TCP/IP Core for Reconfigurable Logic
    Download  www.ics.forth.gr
    Apostolos Dollas, Ioannis Ermis, Iosif Koidis, Ioa...
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    ISVLSI
    2005
    IEEE
    95views VLSI» more  ISVLSI 2005»
    System Level Methodology for Programming CMP Based Multi-Threaded Network Processor Architectures
    15 years 11 months ago
    System Level Methodology for Programming CMP Based Multi-Threaded Network Processor Architectures
    Download  www.princeton.edu
    Vijaykumar Ramamurthi, Jason McCollum, Christopher...
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    ISVLSI
    2005
    IEEE
    102views VLSI» more  ISVLSI 2005»
    Bi-Direction Synthesis for Reversible Circuits
    15 years 11 months ago
    Bi-Direction Synthesis for Reversible Circuits
    Download  web.cecs.pdx.edu
    Guowu Yang, Xiaoyu Song, William N. N. Hung, Marek...
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