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137

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VLSID
2007
IEEE

98views VLSI» more VLSID 2007»

Power Reduction in VLIW Processor with Compiler Driven Bypass Network

16 years 6 months ago

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Neeraj Goel, Anshul Kumar, Preeti Ranjan Panda

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119

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VLSID
2007
IEEE

112views VLSI» more VLSID 2007»

Synthesizing "Verification Aware" Models: Why and How?

16 years 6 months ago

Download www.nec-labs.com

Malay K. Ganai, Akira Mukaiyama, Aarti Gupta, Kazu...

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147

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VLSID
2007
IEEE

127views VLSI» more VLSID 2007»

Scalable techniques and tools for reliability analysis of large circuits

16 years 6 months ago

Download www.fermat.ece.vt.edu

Debayan Bhaduri, Sandeep K. Shukla, Paul Graham, M...

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125

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VLSID
2006
IEEE

103views VLSI» more VLSID 2006»

A Low Power ROM-Less Direct Digital Frequency Synthesizer with Preset Value Pipelined Accumulator

16 years 6 months ago

Download ic.ncue.edu.tw

Jun Chen, Rong Luo, Huazhong Yang, Hui Wang

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129

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VLSID
2006
IEEE

111views VLSI» more VLSID 2006»

An Area Efficient Mixed-Signal Test Architecture for Systems-on-a-Chip

16 years 6 months ago

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