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FCCM
2007
IEEE
122views VLSI» more  FCCM 2007»
15 years 10 months ago
Reconfigurable Computing Cluster (RCC) Project: Investigating the Feasibility of FPGA-Based Petascale Computing
While medium- and large-sized computing centers have increasingly relied on clusters of commodity PC hardware to provide cost-effective capacity and capability, it is not clear th...
Ron Sass, William V. Kritikos, Andrew G. Schmidt, ...
GLVLSI
2007
IEEE
194views VLSI» more  GLVLSI 2007»
15 years 10 months ago
Probabilistic maximum error modeling for unreliable logic circuits
Reliability modeling and evaluation is expected to be one of the major issues in emerging nano-devices and beyond 22nm CMOS. Such devices would have inherent propensity for gate f...
Karthikeyan Lingasubramanian, Sanjukta Bhanja
GLVLSI
2009
IEEE
126views VLSI» more  GLVLSI 2009»
15 years 10 months ago
An efficient cut enumeration for depth-optimum technology mapping for LUT-based FPGAs
Recent technology mappers for LUT based FPGAs employ cut enumeration. Although many cuts are often needed to nd good network, enumerating all cuts with large size consumes run-tim...
Taiga Takata, Yusuke Matsunaga
GLVLSI
2009
IEEE
170views VLSI» more  GLVLSI 2009»
15 years 10 months ago
Physical unclonable function and true random number generator: a compact and scalable implementation
Physical Unclonable Functions (PUF) and True Random Number Generators (TRNG) are two very useful components in secure system design. PUFs can be used to extract chip-unique signat...
Abhranil Maiti, Raghunandan Nagesh, Anand Reddy, P...
GLVLSI
2009
IEEE
158views VLSI» more  GLVLSI 2009»
15 years 10 months ago
Exploration of memory hierarchy configurations for efficient garbage collection on high-performance embedded systems
Modern embedded devices (e.g., PDAs, mobile phones) are now incorporating Java as a very popular implementation language in their designs. These new embedded systems include multi...
José Manuel Velasco, David Atienza, Katzali...