2449 search results - page 278 / 490 » VLSI |
189
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FCCM
2005
IEEE
16 years 6 days ago
2005
IEEE
The CLA-EC is a model obtained by combining the concepts of cellular learning automata and evolutionary algorithms. The parallel structure of the CLA-EC makes it suitable for hard...
140
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FCCM
2005
IEEE
16 years 6 days ago
2005
IEEE
The solution to a set of sparse linear equations Ax = b, where A is an n×n sparse matrix and b is an n-element vector, can be obtained using the W-matrix method. An enhanced vect...
134
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FCCM
2005
IEEE
16 years 6 days ago
2005
IEEE
This paper presents timing and area results for an FPGA implementation of a CDMA-based switch for networkson-chip. The design was mapped onto the Xilinx Virtex4 XC4VLX200 device u...
159
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FCCM
2005
IEEE
16 years 6 days ago
2005
IEEE
FPGA-based floating-point kernels must exploit algorithmic parallelism and use deeply pipelined cores to gain a performance advantage over general-purpose processors. Inability t...
158
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ISCAS
2005
IEEE
16 years 5 days ago
2005
IEEE
— Interconnect plays an increasingly important role in deep submicrometer VLSI technologies. Multiple design criteria are considered in interconnect design, such as delay, power,...