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VLSID
2001
IEEE
104views VLSI» more  VLSID 2001»
16 years 6 months ago
Partitioning Routing Area into Zones with Distinct Pins
Koushik Sinha, Susmita Sur-Kolay, Bhargab B. Bhatt...
RECONFIG
2009
IEEE
188views VLSI» more  RECONFIG 2009»
16 years 1 months ago
Accelerating Cryptographic Applications Using Dynamically Reconfigurable Functional Units
Antoine Trouve, Lovic Gauthier, Takayuki Kando, Be...
RECONFIG
2008
IEEE
104views VLSI» more  RECONFIG 2008»
16 years 26 days ago
A Hybrid FPGA/Coarse Parallel Processing Architecture for Multi-modal Visual Feature Descriptors
Lars Baunegaard With Jensen, Anders Kjaer-Nielsen,...
FCCM
2006
IEEE
105views VLSI» more  FCCM 2006»
16 years 16 days ago
Virtual Embedded Blocks: A Methodology for Evaluating Embedded Elements in FPGAs
Chun Hok Ho, Philip Heng Wai Leong, Wayne Luk, Ste...