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IEEEPACT
2006
IEEE
16 years 18 days ago
A two-phase escape analysis for parallel java programs
Thread escape analysis conservatively determines which objects may be accessed in more than one thread. Thread escape analysis is useful for a variety of purposes – finding rac...
Kyungwoo Lee, Samuel P. Midkiff
ICS
1999
Tsinghua U.
15 years 11 months ago
Nonlinear array layouts for hierarchical memory systems
Programming languages that provide multidimensional arrays and a flat linear model of memory must implement a mapping between these two domains to order array elements in memory....
Siddhartha Chatterjee, Vibhor V. Jain, Alvin R. Le...
AHS
2006
IEEE
95views Hardware» more  AHS 2006»
15 years 10 months ago
A Modular Framework for the Evolution of Circuits on Configurable Transistor Array Architectures
This paper gives an overview over the progress that has been made by the Heidelberg FPTA group within the field of analog evolvable hardware. Achievements are the design of a CMOS...
Martin Trefzer, Jörg Langeheine, Karlheinz Me...
IUI
2010
ACM
16 years 3 months ago
Facilitating exploratory search by model-based navigational cues
We present an extension of a computational cognitive model of social tagging and exploratory search called the semantic imitation model. The model assumes a probabilistic represen...
Wai-Tat Fu, Thomas George Kannampallil, Ruogu Kang
GECCO
2005
Springer
186views Optimization» more  GECCO 2005»
16 years 3 days ago
Subproblem optimization by gene correlation with singular value decomposition
Several ways of using singular value decomposition (SVD), a linear algebra technique typically used for information retrieval, to decompose problems into subproblems are investiga...
Jacob G. Martin