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IPPS
2000
IEEE
15 years 11 months ago
Dynamic Data Layouts for Cache-Conscious Factorization of DFT
Effective utilization of cache memories is a key factor in achieving high performance in computing the Discrete Fourier Transform (DFT). Most optimizationtechniques for computing ...
Neungsoo Park, Dongsoo Kang, Kiran Bondalapati, Vi...
AAIP
2009
15 years 7 months ago
Incremental Learning in Inductive Programming
Inductive programming systems characteristically exhibit an exponential explosion in search time as one increases the size of the programs to be generated. As a way of overcoming ...
Robert Henderson
ICCD
2007
IEEE
225views Hardware» more  ICCD 2007»
16 years 3 months ago
Fine grain 3D integration for microarchitecture design through cube packing exploration
Most previous 3D IC research focused on “stacking” traditional 2D silicon layers, so the interconnect reduction is limited to interblock delays. In this paper, we propose tech...
Yongxiang Liu, Yuchun Ma, Eren Kursun, Glenn Reinm...
ICLP
2001
Springer
15 years 11 months ago
On a Tabling Engine That Can Exploit Or-Parallelism
Tabling is an implementation technique that improves the declarativeness and expressiveness of Prolog by reusing solutions to goals. Quite a few interesting applications of tabling...
Ricardo Rocha, Fernando M. A. Silva, Vítor ...
CLUSTER
2002
IEEE
15 years 11 months ago
Mixed Mode Matrix Multiplication
In modern clustering environments where the memory hierarchy has many layers (distributed memory, shared memory layer, cache,  ¡ ¢  ), an important question is how to fully u...
Meng-Shiou Wu, Srinivas Aluru, Ricky A. Kendall