Sciweavers

2432 search results - page 247 / 487
» Using simple abstraction to reinvent computing for paralleli...
Sort
View
ICLP
1997
Springer
15 years 10 months ago
Non-Failure Analysis for Logic Programs
We provide a method whereby, given mode and (upper approximation) type information, we can detect procedures and goals that can be guaranteed to not fail (i.e., to produce at leas...
Saumya K. Debray, Pedro López-García...
ISCAPDCS
2003
15 years 8 months ago
Loop Transformation Techniques To Aid In Loop Unrolling and Multithreading
In modern computer systems loops present a great deal of opportunities for increasing Instruction Level and Thread Level Parallelism. Loop unrolling is a technique used to obtain ...
Litong Song, Yuhua Zhang, Krishna M. Kavi
HPCA
1996
IEEE
15 years 10 months ago
Protected, User-Level DMA for the SHRIMP Network Interface
Traditional DMA requires the operating system to perform many tasks to initiate a transfer, with overhead on the order of hundreds or thousands of CPU instructions. This paper des...
Matthias A. Blumrich, Cezary Dubnicki, Edward W. F...
ICDCS
2007
IEEE
16 years 27 days ago
Defragmenting DHT-based Distributed File Systems
Existing DHT-based file systems use consistent hashing to assign file blocks to random machines. As a result, a user task accessing an entire file or multiple files needs to r...
Jeffrey Pang, Phillip B. Gibbons, Michael Kaminsky...
IPPS
2007
IEEE
16 years 27 days ago
A new framework to accelerate Virtex-II Pro dynamic partial self-reconfiguration
The Xilinx Virtex family of FPGAs provides the ability to perform partial run-time reconfiguration, also known as dynamic partial reconfiguration (DPR). Taking this concept one st...
Christopher Claus, Florian Helmut Müller, Joh...