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DAC
2008
ACM
16 years 7 months ago
Transistor level gate modeling for accurate and fast timing, noise, and power analysis
Current source based cell models are becoming a necessity for accurate timing and noise analysis at 65nm and below. Voltage waveform shapes are increasingly more difficult to repr...
S. Raja, F. Varadi, Murat R. Becer, Joao Geada
DAC
2005
ACM
16 years 7 months ago
Flexible ASIC: shared masking for multiple media processors
ASIC provides more than an order of magnitude advantage in terms of density, speed, and power requirement per gate. However, economic (cost of masks) and technological (deep micro...
Jennifer L. Wong, Farinaz Koushanfar, Miodrag Potk...
DAC
2006
ACM
16 years 7 months ago
Efficient simulation of critical synchronous dataflow graphs
Simulation and verification using electronic design automation (EDA) tools are key steps in the design process for communication and signal processing systems. The synchronous dat...
Chia-Jui Hsu, José Luis Pino, Ming-Yung Ko,...
SIGSOFT
2009
ACM
16 years 7 months ago
Automatic steering of behavioral model inference
Many testing and analysis techniques use finite state models to validate and verify the quality of software systems. Since the specification of such models is complex and timecons...
David Lo, Leonardo Mariani, Mauro Pezzè
CHI
2009
ACM
16 years 7 months ago
QUICKIES: the future of sticky notes
In this paper, we present `QUICKIES', an attempt to bring one of the most useful inventions of the 20th century into the digital age: the ubiquitous sticky notes. `QUICKIES&#...
Pranav Mistry
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