Sciweavers

4770 search results - page 326 / 954
» Using System-on-a-Programmable-Chip Technology to Design Emb...
Sort
View
232
Voted
VLSID
1993
IEEE
234views VLSI» more  VLSID 1993»
15 years 11 months ago
NPCPL: Normal Process Complementary Pass Transistor Logic for Low Latency, High Throughput Designs
High throughput and low latency designs are required in modern high performance systems, especially for signal processing applications. Existing logic families cannot provide both...
Debabrata Ghosh, S. K. Nandy, K. Parthasarathy, V....
ASPDAC
2005
ACM
106views Hardware» more  ASPDAC 2005»
15 years 8 months ago
Using loop invariants to fight soft errors in data caches
Ever scaling process technology makes embedded systems more vulnerable to soft errors than in the past. One of the generic methods used to fight soft errors is based on duplicati...
Sri Hari Krishna Narayanan, Seung Woo Son, Mahmut ...
DATE
2003
IEEE
87views Hardware» more  DATE 2003»
16 years 2 days ago
A First Step Towards Hw/Sw Partitioning of UML Specifications
This paper proposes a novel methodology tailored to design embedded systems, taking into account the emerging market needs, such as hw/sw partitioning, object-oriented specificati...
William Fornaciari, P. Micheli, Fabio Salice, L. Z...
COOPIS
2004
IEEE
15 years 10 months ago
Ontology for Nature-Scene Image Retrieval
This paper presents a framework for building an ontology to provide semantic interpretations in image contents. The novelty of this framework comes from building a MPEG-7 ontology ...
Song Liu, Liang-Tien Chia, Syin Chan
CASES
2006
ACM
15 years 10 months ago
State space reconfigurability: an implementation architecture for self modifying finite automata
Many embedded systems exhibit temporally and behaviorally disjoint behavior slices. When such behaviors are captured by state machines, the current design flow will capture it as ...
Ka-Ming Keung, Akhilesh Tyagi