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IESS
2009
Springer
182views Hardware» more  IESS 2009»
15 years 4 months ago
Modeling Cache Effects at the Transaction Level
Abstract. Embedded system design complexities are growing exponentially. Demand has increased for modeling techniques that can provide both accurate measurements of delay and fast ...
Ardavan Pedram, David Craven, Andreas Gerstlauer
189
Voted
PROFES
2004
Springer
16 years 1 days ago
Using a Reference Application with Design Patterns to Produce Industrial Software
Abstract. System architectures are described in abstract terms, often using Design Patterns. Actual reuse based on such descriptions requires that each development project derive a...
Marek Vokác, Oluf Jensen
DATE
2008
IEEE
77views Hardware» more  DATE 2008»
16 years 1 months ago
Re-Examining the Use of Network-on-Chip as Test Access Mechanism
Existing work on testing NoC-based systems advocates to reuse the on-chip network itself as test access mechanism (TAM) to transport test data to/from embedded cores. While this m...
Feng Yuan, Lin Huang, Qiang Xu
NSPW
2006
ACM
16 years 19 days ago
PKI design for the real world
What would a PKI look like if it were designed for implementability and deployability rather than strict adherence to a particular theoretical or mathematical model? This paper pr...
Peter Gutmann
RTAS
2008
IEEE
16 years 1 months ago
WCET Analysis for Multi-Core Processors with Shared L2 Instruction Caches
Multi-core chips have been increasingly adopted by microprocessor industry. For real-time systems to safely harness the potential of multi-core computing, designers must be able t...
Jun Yan, Wei Zhang