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ICCAD
2009
IEEE
151views Hardware» more  ICCAD 2009»
15 years 4 months ago
Timing yield-aware color reassignment and detailed placement perturbation for double patterning lithography
Double patterning lithography (DPL) is a likely resolution enhancement technique for IC production in 32nm and below technology nodes. However, DPL gives rise to two independent, ...
Mohit Gupta, Kwangok Jeong, Andrew B. Kahng
ECRTS
2006
IEEE
16 years 19 days ago
WCET-Centric Software-controlled Instruction Caches for Hard Real-Time Systems
Cache memories have been extensively used to bridge the gap between high speed processors and relatively slower main memories. However, they are sources of predictability problems...
Isabelle Puaut
IPPS
2003
IEEE
15 years 12 months ago
Extending OpenMP to Support Slipstream Execution Mode
OpenMP has emerged as a widely accepted standard for writing shared memory programs. Hardware-specific extensions such as data placement are usually needed to improve the scalabi...
Khaled Z. Ibrahim, Gregory T. Byrd
WINET
2010
127views more  WINET 2010»
15 years 4 months ago
A Markov Decision Process based flow assignment framework for heterogeneous network access
We consider a scenario where devices with multiple networking capabilities access networks with heterogeneous characteristics. In such a setting, we address the problem of effici...
Jatinder Pal Singh, Tansu Alpcan, Piyush Agrawal, ...
BMCBI
2008
92views more  BMCBI 2008»
15 years 6 months ago
A semiparametric modeling framework for potential biomarker discovery and the development of metabonomic profiles
Background: The discovery of biomarkers is an important step towards the development of criteria for early diagnosis of disease status. Recently electrospray ionization (ESI) and ...
Samiran Ghosh, David F. Grant, Dipak K. Dey, Denni...