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» Using Operational Architecture to Model Embedded Software
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DAC
2005
ACM
15 years 8 months ago
Performance simulation modeling for fast evaluation of pipelined scalar processor by evaluation reuse
This paper proposes a rapid and accurate evaluation scheme for cycle counts of a pipelined processor using evaluation reuse technique. Since exploration of an optimal processor is...
Ho Young Kim, Tag Gon Kim
ISPASS
2007
IEEE
16 years 29 days ago
Modeling and Characterizing Power Variability in Multicore Architectures
Parameter variation due to manufacturing error will be an unavoidable consequence of technology scaling in future generations. The impact of random variation in physical factors s...
Ke Meng, Frank Huebbers, Russ Joseph, Yehea I. Ism...
ASPLOS
1992
ACM
15 years 10 months ago
Parity Declustering for Continuous Operation in Redundant Disk Arrays
We describe and evaluate a strategy for declustering the parity encoding in a redundant disk array. This declustered parity organization balances cost against data reliability and...
Mark Holland, Garth A. Gibson
VLSID
2003
IEEE
253views VLSI» more  VLSID 2003»
16 years 7 months ago
High Level Synthesis from Sim-nML Processor Models
The design of modern complex embedded systems require a high level of abstraction of the design. The SimnML[1] is a specification language to model processors for such designs. Se...
Souvik Basu, Rajat Moona
PDCAT
2004
Springer
16 years 16 hour ago
An In-Order SMT Architecture with Static Resource Partitioning for Consumer Applications
Abstract. This paper proposes a simplified simultaneous multithreading (SMT) architecture aiming at CPU cores of embedded SoCs for consumer applications. This architecture reduces...
Byung In Moon, Hongil Yoon, Ilgun Yun, Sungho Kang