In this article we merge point feature and intensity-based registration in a single algorithm to tackle the problem of multiple brain registration. Because of the high variability ...
We present an error catch and analysis (ECA) system for semiconductor memories. The system consists of a test algorithm generator called TAGS, a fault simulator called RAMSES, and...
Dynamic-current based test techniques can potentially address the drawbacks of traditional and Iddq test methodologies. The quality of dynamic current based test is degraded by pr...
This paper presents a framework that uses the outputs of model simplification to guide the construction of bounding volume hierarchies for use in, for example, collision detection...
The design and synthesis of asynchronous circuits is gaining importance in both the industrial and academic worlds. Timed circuits are a class of asynchronous circuits that incorp...