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ICCD
2007
IEEE
132views Hardware» more  ICCD 2007»
16 years 3 months ago
Post-layout comparison of high performance 64b static adders in energy-delay space
Our objective was to determine the most energy efficient 64b static CMOS adder architecture, for a range of high-performance delay targets. We examine extensively carry-lookahead ...
Sheng Sun, Carl Sechen
ICCD
2006
IEEE
115views Hardware» more  ICCD 2006»
16 years 3 months ago
Long-term Performance Bottleneck Analysis and Prediction
— Identifying performance bottlenecks is important for microarchitects and application developers to produce high performance microprocessor designs and application software. Man...
Fei Gao, Suleyman Sair
ICCD
2003
IEEE
89views Hardware» more  ICCD 2003»
16 years 3 months ago
Precomputation-based Guarding for Dynamic and Leakage Power Reduction
- This paper presents a precomputation-based guarding technique to reduce both dynamic and static power consumptions in CMOS VLSI circuits. More precisely, a high threshold sleep t...
Afshin Abdollahi, Massoud Pedram, Farzan Fallah, I...
ICCAD
2008
IEEE
129views Hardware» more  ICCAD 2008»
16 years 3 months ago
A capacitance solver for incremental variation-aware extraction
Abstract—Lithographic limitations and manufacturing uncertainties are resulting in fabricated shapes on wafer that are topologically equivalent, but geometrically different from ...
Tarek A. El-Moselhy, Ibrahim M. Elfadel, Luca Dani...
ICCAD
2008
IEEE
125views Hardware» more  ICCAD 2008»
16 years 3 months ago
A succinct memory model for automated design debugging
— In today’s complex SoC designs, verification and debugging are becoming ever more crucial and increasingly timeconsuming tasks. The prevalence of embedded memories adds to t...
Brian Keng, Hratch Mangassarian, Andreas G. Veneri...
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