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IPPS
1996
IEEE
15 years 10 months ago
A New Approach to Pipeline FFT Processor
A new VLSI architecture for real-time pipeline FFT processor is proposed. A hardware oriented radix-22 algorithm is derived by integrating a twiddle factor decomposition technique ...
Shousheng He, Mats Torkelson
CONPAR
1994
15 years 10 months ago
The Rewrite Rule Machine Node Architecture and Its Performance
The Rewrite Rule Machine (RRM) is a massively parallel MIMD/SIMD computer designed with the explicit purpose of supporting veryhigh-level parallel programming with rewrite rules. T...
Patrick Lincoln, José Meseguer, Livio Ricci...
ICPP
2008
IEEE
16 years 1 months ago
An Incentive-Compatible Mechanism for Scheduling Non-Malleable Parallel Jobs with Individual Deadlines
We design an incentive-compatible mechanism for scheduling n non-malleable parallel jobs on a parallel system comprising m identical processors. Each job is owned by a selfish us...
Thomas E. Carroll, Daniel Grosu
PDP
1997
IEEE
15 years 10 months ago
The controlled logical clock--a global time for trace-based software monitoring of parallel applications in workstation clusters
Event tracing and monitoring of parallel applications are difficult if each processor has its own unsynchronized clock. A survey is given on several strategies to generate a glob...
Rolf Rabenseifner
IJMMS
2007
163views more  IJMMS 2007»
15 years 6 months ago
Beyond ontologies: Toward situated representations of scientific knowledge
: In information systems that support knowledge-discovery applications such as scientific exploration, reliance on highly structured ontologies as data-organization aids can be lim...
William Pike, Mark Gahegan