2065 search results - page 77 / 413 » Using Architectural Models at Runtime: Research Challenges |
167
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DSD
2004
IEEE
15 years 10 months ago
2004
IEEE
Validation of programmable architectures, consisting of processor cores, coprocessors, and memory subsystems, is one of the major bottlenecks in current Systemon-Chip design metho...
176
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IPPS
2005
IEEE
15 years 11 months ago
2005
IEEE
In recent years the Unified Modeling Language (UML) including its profiles gained increasing acceptance as a specification language for modeling real-time systems. It is crucia...
201
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ERSA
2010
15 years 4 months ago
2010
Interconnect architecture is a primary research issue for emerging many-core processors. Packet switched Networks-on-Chip (NoCs) are considered key to success but since they delive...
143
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SRDS
2000
IEEE
15 years 10 months ago
2000
IEEE
Validation of distributed systems using fault injection is difficult because of their inherent complexity, lack of a global clock, and lack of an easily accessible notion of a gl...
174
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SACMAT
2006
ACM
16 years 4 days ago
2006
ACM
We propose an integrity measurement approach based on information flow integrity, which we call the Policy-Reduced Integrity Measurement Architecture (PRIMA). The recent availabi...