4445 search results - page 345 / 889 » Use of statistical timing analysis on real designs |
164
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FPGA
2009
ACM
16 years 1 months ago
2009
ACM
This paper presents a hardware architecture for face detection based system on AdaBoost algorithm using Haar features. We describe the hardware design techniques including image s...
205
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RTCSA
2007
IEEE
16 years 1 months ago
2007
IEEE
— To use the tremendous hardware resources available in next generation MultiProcessor Systems-on-Chip (MPSoC) efficiently, rapid and accurate design space exploration (DSE) met...
213
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DATE
2009
IEEE
15 years 10 months ago
2009
IEEE
—Power management at any abstraction level is a key issue for many mobile multimedia and embedded applications. In this paper a design workflow to generate system-level power mo...
135
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CAISE
2005
Springer
16 years 12 days ago
2005
Springer
In this paper we are trying to clarify, with the aid of some semiotic notions, the confusions that lie around the widely used terms “analysis model” and “design model” in s...
193
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DATE
2006
IEEE
16 years 27 days ago
2006
IEEE
Abstract— Continuing scaling of CMOS technology has allowed aggressive pursuant of increased clock rate in DSM chips. The ever shorter clock period has made switching times of di...