4445 search results - page 236 / 889 » Use of statistical timing analysis on real designs |
190
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ASPDAC
2006
ACM
16 years 18 days ago
2006
ACM
- One of the critical issues in MTCMOS design is how to estimate a circuit delay quickly. In this paper, we propose a delay modeling and static timing analysis (STA) methodology ta...
166
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RSP
2005
IEEE
16 years 6 days ago
2005
IEEE
Networks-on-chip (NoCs) are an emergent communication infrastructure, which can be designed to deal with growing system complexity and technology evolution. The efficient use of N...
180
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ICCAD
2006
IEEE
16 years 3 months ago
2006
IEEE
Abstract— Design variability due to within-die and die-todie process variations has the potential to significantly reduce the maximum operating frequency and the effective yield...
144
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HPCA
2008
IEEE
16 years 7 months ago
2008
IEEE
Recent advances in statistical inference and machine learning close the divide between simulation and classical optimization, thereby enabling more rigorous and robust microarchit...
167
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ASPDAC
2009
ACM
16 years 1 months ago
2009
ACM
Abstract— Double patterning lithography (DPL) is in current production for memory products, and is widely viewed as inevitable for logic products at the 32nm node. DPL decomposes...