112 search results - page 5 / 23 » Use of local biasing in designing analog integrated circuits |
174
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GLVLSI
1998
IEEE
15 years 10 months ago
1998
IEEE
In this research, we devised a new simple technique for statically holding analog weights, which does not require periodic refreshing. It further contains a mechanism to locally u...
151
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SBCCI
2006
ACM
16 years 11 hour ago
2006
ACM
This paper presents a transistor optimization methodology for low-power analog integrated CMOS circuits, relying on the physics-based gm/ID characteristics as a design optimizatio...
252
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DAC
2009
ACM
16 years 7 months ago
2009
ACM
Efficient system-level design is increasingly relying on hierarchical design-space exploration, as well as compositional methods, to shorten time-to-market, leverage design re-use...
170
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DAC
2004
ACM
16 years 7 months ago
2004
ACM
Long design cycles due to the inability to predict silicon realities is a well-known problem that plagues analog/RF integrated circuit product development. As this problem worsens...
146
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MSE
1999
IEEE
15 years 10 months ago
1999
IEEE
This paper presents a PC based software running on PC dedicated to the training in sub-micron CMOS VLSI design. The software firstly consists in a HDL-based schematic editor with ...