In double patterning lithography (DPL) layout decomposition for 45nm and below process nodes, two features must be assigned opposite colors (corresponding to different exposures)...
Andrew B. Kahng, Chul-Hong Park, Xu Xu, Hailong Ya...
This paper presents an architecture for generating a high-speed data pattern with precise edge placement resolution by using the matched delay technique. The technique involves ...
Gary C. Moyer, Mark Clements, Wentai Liu, Toby Sch...
With the advent of Web 2.0 and the emergence of improved technologies to enhance UI, the importance of user experience and intuitiveness of Web interfaces led to the growth and su...
An approach to managing the architecture of large software systems is presented. Dependencies are extracted from the code by a conventional static analysis, and shown in a tabular...
Neeraj Sangal, Ev Jordan, Vineet Sinha, Daniel Jac...
We propose an interleaved memory organization supporting multi-pattern parallel accesses in twodimensional (2D) addressing space. Our proposal targets computing systems with high ...
Arseni Vitkovski, Georgi Kuzmanov, Georgi Gaydadji...