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ISCA
2010
IEEE
163views Hardware» more  ISCA 2010»
15 years 11 months ago
WiDGET: Wisconsin decoupled grid execution tiles
The recent paradigm shift to multi-core systems results in high system throughput within a specified power budget. However, future systems still require good single thread perfor...
Yasuko Watanabe, John D. Davis, David A. Wood
ISCA
2010
IEEE
236views Hardware» more  ISCA 2010»
15 years 11 months ago
Elastic cooperative caching: an autonomous dynamically adaptive memory hierarchy for chip multiprocessors
Next generation tiled microarchitectures are going to be limited by off-chip misses and by on-chip network usage. Furthermore, these platforms will run an heterogeneous mix of ap...
Enric Herrero, José González, Ramon ...
ISCA
2002
IEEE
91views Hardware» more  ISCA 2002»
15 years 11 months ago
Slack: Maximizing Performance Under Technological Constraints
Many emerging processor microarchitectures seek to manage technological constraints (e.g., wire delay, power, and circuit complexity) by resorting to nonuniform designs that provi...
Brian A. Fields, Rastislav Bodík, Mark D. H...
ICNP
2000
IEEE
15 years 10 months ago
An Image Transport Protocol for the Internet
Images account for a significant and growing fraction of Web downloads. The traditional approach to transporting images uses TCP, which provides a generic reliable, in-order eam ...
Suchitra Raman, Hari Balakrishnan, Murari Srinivas...
IUI
1999
ACM
15 years 10 months ago
Integrating Organizational Memory and Performance Support
We describe an approach to building integrated performance support systems by using model-based task tracking to link performance support tools to video-based organizational memor...
Christopher R. Johnson, Lawrence Birnbaum, Ray Bar...