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ISPASS
2010
IEEE
16 years 1 months ago
Synthesizing memory-level parallelism aware miniature clones for SPEC CPU2006 and ImplantBench workloads
Abstract—We generate and provide miniature synthetic benchmark clones for modern workloads to solve two pre-silicon design challenges, namely: 1) huge simulation time (weeks to m...
Karthik Ganesan, Jungho Jo, Lizy K. John
DASFAA
2009
IEEE
252views Database» more  DASFAA 2009»
16 years 1 months ago
Optimal Privacy-Aware Path in Hippocratic Databases
Abstract. Privacy becomes a major concern for both customers and enterprises in today’s corporate marketing strategies, many research efforts have been put into developing new p...
Min Li, Xiaoxun Sun, Hua Wang, Yanchun Zhang
171
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ICPP
2009
IEEE
16 years 1 months ago
Code Semantic-Aware Runahead Threads
Memory-intensive threads can hoard shared resources without making progress on a multithreading processor (SMT), thereby hindering the overall system performance. A recent promisi...
Tanausú Ramírez, Alex Pajuelo, Olive...
INFOCOM
2009
IEEE
16 years 1 months ago
Duty-Cycle-Aware Broadcast in Wireless Sensor Networks
—Broadcast is one of the most fundamental services in wireless sensor networks (WSNs). It facilitates sensor nodes to propagate messages across the whole network, serving a wide ...
Feng Wang, Jiangchuan Liu
ISORC
2009
IEEE
16 years 1 months ago
Adding Timing-Awareness to AUTOSAR Basic-Software -- A Component Based Approach
AUTOSAR as specified in its current version fosters timing-constraints at application level to support the development of real-time automotive applications. However, the standard...
Dietmar Schreiner, Markus Schordan, Jens Knoop