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TON
2008
95views more  TON 2008»
15 years 6 months ago
Integration of explicit effective-bandwidth-based QoS routing with best-effort routing
This paper presents a methodology for protecting low-priority best-effort (BE) traffic in a network domain that provides both virtual-circuit routing with bandwidth reservation for...
Stephen L. Spitler, Daniel C. Lee
ISPD
2012
ACM
248views Hardware» more  ISPD 2012»
14 years 1 months ago
A fast estimation of SRAM failure rate using probability collectives
Importance sampling is a popular approach to estimate rare event failures of SRAM cells. We propose to improve importance sampling by probability collectives. First, we use “Kul...
Fang Gong, Sina Basir-Kazeruni, Lara Dolecek, Lei ...
ARITH
2009
IEEE
16 years 1 months ago
Datapath Synthesis for Standard-Cell Design
Datapath synthesis for standard-cell design goes through extraction of arithmetic operations from RTL code, high-level arithmetic optimizations and netlist generation. Numerous ar...
Reto Zimmermann
ISCAS
2006
IEEE
82views Hardware» more  ISCAS 2006»
16 years 9 days ago
Timing optimization of interconnect by simultaneous net-ordering, wire sizing and spacing
– This paper addresses the problem of ordering and sizing parallel wires in a single metal layer within an interconnect channel of a given width, such that crosscapacitances are ...
Konstantin Moiseev, Shmuel Wimer, Avinoam Kolodny
FCCM
2006
IEEE
162views VLSI» more  FCCM 2006»
16 years 10 days ago
Power Visualization, Analysis, and Optimization Tools for FPGAs
This paper introduces the Low-Power Intelligent Tool Environment (LITE), an object oriented tool set designed for power visualization, analysis, and optimization. These tools lever...
Matthew French, Li Wang, Michael J. Wirthlin