1217 search results - page 168 / 244 » Uncertainty-aware circuit optimization |
168
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GLVLSI
2009
IEEE
16 years 28 days ago
2009
IEEE
This paper introduces pass-transistor logic design with dualthreshold voltages. A set of single-rail, fully restored, passtransistor gates are presented. Logic transistors are imp...
159
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GLVLSI
2007
IEEE
16 years 16 days ago
2007
IEEE
This paper proposes a library-free technology mapping algorithm to reduce delay in combinational circuits. The algorithm reduces the overall number of series transistors through t...
155
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ISQED
2007
IEEE
16 years 14 days ago
2007
IEEE
In this paper, we propose a new approach to enforcing the passivity of a reduced system of general passive linear time invariant circuits. Instead of making the reduced models pas...
129
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ICALP
2007
Springer
16 years 10 days ago
2007
Springer
Say that f : {0, 1}n → {0, 1} -approximates g : {0, 1}n → {0, 1} if the functions disagree on at most an fraction of points. This paper contains two results about approximatio...
168
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ASPDAC
2006
ACM
16 years 5 days ago
2006
ACM
Power consumption has gained much saliency in circuit design recently. One design problem is modelled as ”Under a timing constraint, to minimize power as much as possible”. Pr...