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ASPLOS
1991
ACM
15 years 10 months ago
Performance Evaluation of Memory Consistency Models for Shared Memory Multiprocessors
The memory consistency model supported by a multiprocessor architecture determines the amount of buffering and pipelining that may be used to hide or reduce the latency of memory ...
Kourosh Gharachorloo, Anoop Gupta, John L. Henness...
MICRO
1991
IEEE
85views Hardware» more  MICRO 1991»
15 years 10 months ago
Comparing Static and Dynamic Code Scheduling for Multiple-Instruction-Issue Processors
This paper examines two alternative approaches to supporting code scheduling for multiple-instruction-issue processors. One is to provide a set of non-trapping instructions so tha...
Pohua P. Chang, William Y. Chen, Scott A. Mahlke, ...
GPCE
2009
Springer
15 years 10 months ago
Mapping problem-space to solution-space features: a feature interaction approach
Mapping problem-space features into solution-space features is a fundamental configuration problem in software product line engineering. A configuration problem is defined as g...
Frans Sanen, Eddy Truyen, Wouter Joosen
ASPLOS
2008
ACM
15 years 8 months ago
The mapping collector: virtual memory support for generational, parallel, and concurrent compaction
Parallel and concurrent garbage collectors are increasingly employed by managed runtime environments (MREs) to maintain scalability, as multi-core architectures and multi-threaded...
Michal Wegiel, Chandra Krintz
ASPLOS
2008
ACM
15 years 8 months ago
Improving the performance of object-oriented languages with dynamic predication of indirect jumps
Indirect jump instructions are used to implement increasinglycommon programming constructs such as virtual function calls, switch-case statements, jump tables, and interface calls...
José A. Joao, Onur Mutlu, Hyesoon Kim, Rish...
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