1240 search results - page 196 / 248 » Trusted Design in FPGAs |
209
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FCCM
2008
IEEE
16 years 22 days ago
2008
IEEE
The map-reduce model requires users to express their problem in terms of a map function that processes single records in a stream, and a reduce function that merges all mapped out...
208
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INFOCOM
2007
IEEE
16 years 17 days ago
2007
IEEE
Abstract—Deep packet inspection (DPI) is often used in network intrusion detection and prevention systems (NIDPS), where incoming packet payloads are compared against known attac...
173
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FCCM
2006
IEEE
16 years 10 days ago
2006
IEEE
The growth in size and performance of Field Programmable Gate Arrays (FPGAs) has compelled System-on-aProgrammable-Chip (SoPC) designers to use soft processors for controlling sys...
179
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FPGA
2004
ACM
15 years 11 months ago
2004
ACM
The cost functions used to evaluate logic synthesis transformations for FPGAs are far removed from the final speed and routability determined after placement, routing and timing a...
166
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CANPC
1999
Springer
15 years 10 months ago
1999
Springer
Streamlining communication is key to achieving good performance in shared-memory parallel programs. While full hardware support for cache coherence generally offers the best perfo...