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» Trusted Design in FPGAs
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NOCS
2007
IEEE
16 years 21 days ago
NoC-Based FPGA: Architecture and Routing
We present a novel network-on-chip-based architecture for future programmable chips (FPGAs). A key challenge for FPGA design is supporting numerous highly variable design instance...
Roman Gindin, Israel Cidon, Idit Keidar
ISQED
2006
IEEE
116views Hardware» more  ISQED 2006»
16 years 13 days ago
Probabilistic Delay Budgeting for Soft Realtime Applications
Unlike their hard realtime counterparts, soft realtime applications are only expected to guarantee their ”expected delay” over input data space. This paradigm shift calls for ...
Soheil Ghiasi, Po-Kuan Huang
FPL
2010
Springer
139views Hardware» more  FPL 2010»
15 years 4 months ago
Mapping Multiple Multivariate Gaussian Random Number Generators on an FPGA
A Multivariate Gaussian random number generator (MVGRNG) is an essential block for many hardware designs, including Monte Carlo simulations. These simulations are usually used in a...
Chalermpol Saiprasert, Christos-Savvas Bouganis, G...
CANDC
1999
ACM
15 years 10 months ago
A framework that supports collective creativity in design using visual images
The goal of our research is to develop computer systems that support designers’ collective creativity; such systems support individual creative aspects in design through the use...
Kumiyo Nakakoji, Yasuhiro Yamamoto, Masao Ohira
MICRO
2006
IEEE
114views Hardware» more  MICRO 2006»
16 years 13 days ago
Authentication Control Point and Its Implications For Secure Processor Design
Secure processor architecture enables tamper-proof protection on software that addresses many difficult security problems such as reverse-engineering prevention, trusted computing...
Weidong Shi, Hsien-Hsin S. Lee